To avoid dealing with the mind-numbing array of brain-damaged gotchas real
computer architectures lay in the OS implementor's path, the hardware
architecture described here is a combination of generic computer-architecture
features; the whole is not representative of any real computer architecture.
However, some architectural features, particularly the idea of making
everything accessible by mapping into Primary Store, are based on Digital
Equipment Corp.'s Compaq's HP's PDP series of minicomputers.
There are four hardware components in the architecture: the CPU, the Primary Store, a disk, and a terminal. Of these four components, the Primary Store can be thought of as being the main component because all other components in the architecture are accessible through Primary Store.
Primary Store is represented as an array of words. The index associated with each word is also known as the word's address. The arrays are indexed as they are in C: starting from zero and increasing by 1 for each successive array element.
Primary Store is partitioned into three contiguous subarrays known as the the System Space, the User Space, and the Device Space:
These three areas are called "spaces" to emphasize that they are part of Primary Store.
Each space is defined by three constants: s/export/home/uf/rclayton/public-html/f02-505, s/export/home/uf/rclayton/public-html/f02-505,
and s/export/home/uf/rclayton/public-html/f02-505, where s is one of sys, usr, or dev.
The constant values represent
/export/home/uf/rclayton/public-html/f02-505: The lowest accessible address in the associated space.
_size: The number of words in the associated space.
_top: One more than the highest accessible address in the
associated space; that is s_top = s/export/home/uf/rclayton/public-html/f02-505 + s_size.
sys_base is the lowest accessible address in Primary Store and
dev_top is one more than the highest accessible address in Primary Store.
Note also that sys_top == usr_base and usr_top == dev_base.
User Space is divided into 32 page frames, where each page frame consists of 32 consecutive words of user space. Page frames are numbered from 0 to 31 with page frame 0 starting at Primary Store address 1024 and page frame 31 ending just before address 2048.
The hardware uses the contents of five of the CPU registers to control various aspects of process execution; the hardware ignores the contents of the remaining eleven registers. The arrangement of registers in Primary Store is
The five registers used by the hardware are (the constant name in parenthesis is the address of the register)
base_register) top_register) ia_register) pc_register) ps_register) Bits are numbered from right to left in a word; bit 0 is the rightmost bit in a word.
The clock is controlled by a set of two clock registers mapped into a group of two words in Device Space:
The constants clock_register and clock_countdown_register give the
Device-Space addresses of the associated clock registers.
The function of each clock register is
Writing a non-positive integer to the Countdown Register cancels any countdown currently in progress. If no countdown is in progress, writing a non-positive integer to the Countdown Register has no effect.
The constant halt_register gives the Device-Space addresses of the Halt
Register.
Writing a value, any value, into the Halt Register ends simulator execution.
pages_in_user_space
elements; each array element of the page table is a
page-table
entry. The i-th element in the page table corresponds to the
i-th page fame in user space. The fields in a page-table entry are
All fields can be manipulated by the operating system. The hardware also
automatically sets accessed_at and modified_at on each reference
to valid page-table entries.
disk_size gives the number of
blocks in a disk. The size of each disk block is also fixed; all disk blocks
in a disk have the same size. The constant disk_block_size gives the
number of words in a disk block.
A disk is controlled through a set of four disk registers mapped into a group of four words in Device Space:
The constants disk_command_register, disk_block_register, disk_address_register, and disk_status_register give the
Device-Space addresses of the associated disk registers.
The function of each disk register is (the constant name in parenthesis is the Device-Space address of register)
disk_command_register)
Writing the value device::read to the Disk Command Register initiates
disk input: the disk block at the address contained in the Disk Block Register
is moved from the disk to Primary Store starting at the address contained in
the Disk Address Register.
Writing the value device::write to the Disk Command Register initiates
disk output: the data from the sequence of words starting at the address given
in the Disk Address Register and continuing through the size of a disk block is
copied from Primary Store and written to the disk block at the address
contained in the Disk Block Register.
Any value other than device::read or device::write written to the
Disk Command Register is interpreted as an illegal command code.
disk_block_register)disk_address_register)disk_status_register)status::ok | command completed successfully |
status::bad_command | unrecognized command |
status::bad_block_number | bad disk-block number |
status::bad_memory_address | bad primary-store address |
The constants terminal_command_register, terminal_data_register, and terminal_status_register give the Device-Space
addresses of the associated terminal registers.
The function of each terminal register is (the constant name in parenthesis is the Device-Space address of register)
terminal_command_register)
Writing the value device::read to the Terminal Command Register
initiates terminal input: the next 8-bit character to arrive from the
terminal is stored in byte 0 of the Terminal Data Register.
Writing the value device::write to the Terminal Command Register
initiates terminal output: the contents of byte 0 in the Terminal Data
Register is sent to the terminal.
A terminal-io command begins as soon as a command is written to the command register, using the value contained in the data registers (if writing). Once a command is started, writing a new value into the data register has no effect on the in-progress operation.
Any value other than device::read or device::write written to the
Terminal Command Register is interpreted as an illegal command code.
terminal_data_register)terminal_status_register)status::ok | command completed successfully |
status::bad_command | unrecognized command |
vmem_base (inclusive) to vmem_top
(exclusive). A process need not occupy all its process address space; if it
does not, then any attempt to access an address in the unoccupied area of
the process address space should cause an invalid address interrupt.
A process address space is broken up into 64 pages, where each
page
is a contiguous sequence of 32 words. The pages are numbered from 0 to 63,
where page 0 contains address vmem_base and page 63 contains address
vmem_top - 1.
Given an 11-bit virtual address va, the leftmost 6 bits of va
determine the
page number associated with va; the rightmost 5
bits of va determine the
page offset within the page at which
the word addressed by va lies.
usr_base (inclusive) to usr_top (exclusive). A process
need not occupy all its physical process address space; if it does not, then
any attempt to access an address in the unoccupied area of the physical process
address space should cause an invalid address interrupt.
A physical address is interpreted as the 10-bit address of a word in User Space and is not further broken down into component values.
va issued by the CPU is run through the Memory Management Unit
(MMU) to determine where - or if - the page holding va resides in user
space.
Upon receiving the virtual address va, the MMU looks for a
process-table entry having the following characteristics:
va matches page_number.
If such a page-table entry exists, the MMU translates va into a physical
address in User Space; otherwise the MMU throws an invalid address
interrupt. When the MMU throws an invalid address interrupt, the PC is
reset to point to the instruction containing the invalid address.
If a user process is not executing under virtual memory, then every address issued by the CPU is used to access user space directly without translation.
There defined interrupts are (the constant name in parenthesis is the identifying value):
illegal_instruction_i)reboot_i)system_call_i)invalid_address_i)disk_i)terminal_i)countdown_i)The interrupt vector is a set of seven words in System Store that gives the addresses of the code that executes when an interrupt occurs. The interrupt vector occupies storage just above the register set:
The contents of each word is interpreted as the starting address of the code which will be executed when the associated interrupt occurs.
A device begins an operation as soon as a value is written into its Command Register. The device copies the values stored in the argument registers into internal registers at the start of the operation; the argument registers may be rewritten without effecting the operation in progress. Remember:
A device begins an operation as soon as a value is written into its Command Register.
The appropriate interrupt (disk or terminal) is raised when the operation in progress ends. The contents of the Status Register for the operation in progress is undefined until the interrupt is raised. Writing a value into a Command Register always results in an interrupt, even when the status indicates an error.
Writing a value into a Command Register always starts a new operation. If an operation is in progress when a value is written into the Command Register, it is cancelled and a new operation is started. This behavior occurs whether or not the new operation succeeds or fails.
This page last modified on 9 December 2002.