The idea is to treat the frame (up to the block-check field excluding the initial flag) as a n-degree binary polynomial (P in the paper's notation) , where n is the number of bits in the abbreviated frame and divide it by G, a binary polynomial of degree 16. The remainder of the division will be an (at most) binary polynomial of degree 15 (R in the paper's notation), the coefficients of which form the bits in the block-check field.
The receiver can either redivide the abbreviated frame by G and check that the remainder equals the value in the block-check field, or it can subtract the block-check field from the abbreviated frame and divide the result by G; the remainder should be 0.
All this binary polynomial division seems expensive, but it can be implemented simply in hardware using XOR comparators. (or their equivalent).
This page last modified on : 2004/11/14 22:30:30 $.